Cocotb is a Python library that allows writing simulation testbenches for (System)Verilog and VHDL designs in python. It hooks to your simulator via the Standard VPI/DPI interfaces to read and write signals. Your testing logic can be written in Python.
The KISSB CoCotb Package installs cocotb using a python virtual environment, and will start the selected simulator directly.
Warning
While Cocotb provides a Makefile based way to run simulations, the Kissb Package is running cocotb without these, by using Kissb style configuration.
There might be some differences between Cocotb Makefiles and Kissb package way of starting simulators
packagerequirekissb.cocotb
# Init Cocotb and select verilatorcocotb.init
cocotb.simulatorverilator
# By Default, verilator will run using docker# Switch to a local installation # You must have perl installed locallyverilator.runtime.kissbverilator.run--version
# Enable tracingcocotb.settings.trace# Set Verilog sourcesvars.setcocotb.sourcescounter.sv
# Set the name of the python simulation module# if your testbench is located in "sim.py"cocotb.select.modulesim##Run!cocotb.run
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// That's a very bad counter to demonstrate cocotbmodulecounter(inputwireclk,outputreg[3:0]value);initialbeginvalue=0;endalways@(posedgeclk)beginvalue<=value+1;endendmodule